Keywords

generalized analysis, unified model, DC-DC Converters, Soft-Switching

Abstract

For many decades, engineers and students have heavily depended on simulation packages such as Pspice to run transit and steady-state simulation for their circuits. The majority of these circuits, such as soft switching cells, contain complicated modes of operations that require the Pspice simulation to run for a long time and, finally, it may not reach a convergent solution for these kinds of circuits. Also, there is a need for an educational tool that provides students with a better understanding of circuit modes of operation through state-plan figures and steady-state switching waveforms. The unified steady-state computer aided model proposes a simulation block that covers common unified soft-switching cells operations and can be used in topologies simulation. The simulation block has a simple interface that enables the user to choose the switching cell type and connects the developed simulation model in the desired topology configuration. In addition to the measured information that can be obtained from the circuitry around the unified simulation model, the simulation block includes some additional nodes (other than the inputs and outputs) that make internal switching cell information, such as switching voltages and currents, easy to access and debug. The model is based on mathematical equations, resulting in faster simulation times, smaller file size and greatly minimized simulation convergence problems. The Unified Model is based on the generalized analysis: Chapter 1 discusses the generalized equation concept along with a detailed generalization example of one switching cell, which is the zero current switching quasi-resonant converter ZCS-QRC. Chapter 2 presents a detailed discussion of the unified model concept, the unified model flow chart and the unified model implementation in Pspice. Chapter 3 presents the unified model applications; generating the switching cell inductor current and the switching cell capacitor voltage steady-state waveforms, the State-Plane Diagram , the feedback design using the unified model, and the chapter concludes with how the model can be used with different topologies. Finally, chapter 4 presents the summary and the future work

Notes

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Graduation Date

2006

Semester

Spring

Advisor

Batarseh, Issa

Degree

Master of Science in Electrical Engineering (M.S.E.E.)

College

College of Engineering and Computer Science

Department

Electrical and Computer Engineering

Degree Program

Electrical Engineering

Format

application/pdf

Identifier

CFE0001036

URL

http://purl.fcla.edu/fcla/etd/CFE0001036

Language

English

Length of Campus-only Access

None

Access Status

Masters Thesis (Open Access)

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