Title

Delay Analysis Of Binmos Driver Including High-Current Transients

Authors

J. S. Yuan

Title - Alternative

IEEE Trans. Electron Devices

Keywords

Advanced Bipolar-Transistors; Device; Capacitance; Design; Bicmos; Power; Logic; Speed; Engineering, Electrical & Electronic; Physics, Applied

Abstract

The BiNMOS gate delay analysis including high current transients has been developed. The modeling equations account for high electric field effect in the nMOS transistor and emitter crowding, base pushout, and base conductivity modulation in the bipolar transistor. In examining the switching transient of a BiNMOS driver, base pushout mechanism exhibits the detrimental effect on the gate propagation delay. The present circuit modeling methodology provides a fast turn-around design evaluation of sensitivity of process and device parameters into circuit performance. Computer simulation of a BiNMOS driver using the present analysis is compared with PISCES device simulation in support of physical reasoning.

Publication Title

Ieee Transactions on Electron Devices

Volume

39

Issue/Number

3

Publication Date

1-1-1992

Document Type

Article

Language

English

First Page

587

Last Page

592

WOS Identifier

WOS:A1992HE79900019

ISSN

0018-9383

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