Designing High-Performance Processors Using Real Address Prediction
Title - Alternative
IEEE Trans. Comput.
Address Prediction; Address Translation; Cache; Pipelined Processor; Synonym; Computer Science, Hardware & Architecture; Engineering, Electrical &; Electronic
In this correspondence, we propose design techniques that may significantly simplify the cache access path, and hence offer the opportunity of shorter cycle time or fewer pipeline stages. Our proposals are based on highly accurate prediction methods that allow us to efficiently resolve address translation information early in the pipe.
Ieee Transactions on Computers
Hua, K. A.; Liu, L. S.; and Peir, J. K., "Designing High-Performance Processors Using Real Address Prediction" (1993). Faculty Bibliography. 1555.