Modeling short channel effect on high-k and stacked-gate MOSFETs
Abbreviated Journal Title
short channel effect; high-k stacked layer; threshold voltage; deep; submicron; gate dielectrics; surface roughness; DIELECTRICS; Engineering, Electrical & Electronic; Physics, Applied; Physics, ; Condensed Matter
The roll-off of threshold voltage in deep submicron MOSFETs with high-k and stacked gate dielectrics is studied. A model to account for the fringing field effect on the high-k slacked layer dielectrics is proposed. The model predictions are compared with the two-dimensional device simulation. Good agreement between the model predictions and device simulation results has been obtained. (C) 2000 Elsevier Science Ltd. All rights reserved.
"Modeling short channel effect on high-k and stacked-gate MOSFETs" (2000). Faculty Bibliography 2000s. 2878.