Modeling of mismatch effect in submicron MOSFETs based on BSIM3 model and parametric tests
Abbreviated Journal Title
IEEE Electron Device Lett.
analog circuits; BSIM3v3 model; modeling; MOS transistor mismatch; MOS-TRANSISTORS; Engineering, Electrical & Electronic
Mismatch between identically designed MOS transistors plays an important role in the performance of analog circuits. This paper reports a MOS transistor mismatch model applicable for submicron CMOS technology and developed based on the industry standard BSIM3v3 model. A quick way to estimate drain current mismatch based on parametric test data was also suggested.
Ieee Electron Device Letters
"Modeling of mismatch effect in submicron MOSFETs based on BSIM3 model and parametric tests" (2001). Faculty Bibliography 2000s. 3018.