Implementation of a comprehensive and robust MOSITET model in cadence SPICE for ESD applications
Abbreviated Journal Title
IEEE Trans. Comput-Aided Des. Integr. Circuits Syst.
electrostatic discharge; modeling; MOSFET; SPICE; ELECTROSTATIC DISCHARGE; SEMICONDUCTOR-DEVICES; BREAKDOWN; Computer Science, Hardware & Architecture; Computer Science, ; Interdisciplinary Applications; Engineering, Electrical & Electronic
Electrostatic discharge (ESD) is a critical reliability concern for microchips. This paper presents a comprehensive computer-aided design tool for ESD applications. Specifically, the authors develop an improved and robust MOS model and implement such a model into the industry standard Cadence SPICE for ESD circuit simulation. The key components relevant to ESD in the MOS model are studied and the implementation procedure is discussed. Experimental data measured from the human body model tester are included in support of the model.
Ieee Transactions on Computer-Aided Design of Integrated Circuits and Systems
"Implementation of a comprehensive and robust MOSITET model in cadence SPICE for ESD applications" (2002). Faculty Bibliography 2000s. 3209.