Performance analysis and optimisation of NCL self-timed rings
Abbreviated Journal Title
IEE Proc.-Circuit Device Syst.
Engineering, Electrical & Electronic
A self-timed ring using NULL convention logic (NCL) is presented. An analytical method to evaluate the speed of NCL rings has been developed. The analytical predictions are verified by a Synopsys simulation and excellent agreement between the theoretical predictions and simulation results is obtained. Some important principles for ring optimisation are obtained. The analysis leads to the speed optimisation of a 24-bit NCL divider.
Iee Proceedings-Circuits Devices and Systems
"Performance analysis and optimisation of NCL self-timed rings" (2003). Faculty Bibliography 2000s. 3870.