Self-protection capability of integrated NLDMOS power arrays in ESD pulse regimes
Abbreviated Journal Title
Engineering, Electrical & Electronic; Nanoscience & Nanotechnology; Physics, Applied
This paper provides a review of most recent cycle of studies of NLDMOS-based power arrays, their operation in ESD regimes, self-protection capability as well as the methods and measures to improve the array robustness on the device structure, layout architecture and array composition levels. Effective practices of improving ESD robustness at the cell level and backend level are presented followed by topology optimization. Discussion is based upon ESD characterization supported both by device-circuit mixed-mode and 2.5D array level simulations data. (C) 2011 Elsevier Ltd. All rights reserved.
"Self-protection capability of integrated NLDMOS power arrays in ESD pulse regimes" (2011). Faculty Bibliography 2010s. 1048.