Keywords

in-memory, next-generation, emerging technologies, non-volatile memory

Abstract

Since the dawn of computing, all practical computing systems, from small laptops and cellphones to large mainframes and supercomputers, have been based on the Von Neumann architecture. In this architectural model, computing units and storage units are physically separated, requiring the computing system to spend most of its time and energy on moving data around. As many recently developed applications are driven by large volumes of digital data, the Von Neumann architecture does not scale well with today’s computational demands. In-memory computing using emerging non-volatile device technologies is a promising orthogonal approach as it mitigates the adverse effects of the physical separation, also known as the Von Neumann bottleneck, by merging storage and memory units.

The first part of this thesis is focused on synthesis, verification, and fault-tolerance techniques for flow-based in-memory computing. In synthesis, computations are mapped onto nanoscale crossbars of non-volatile memory devices with the objective of minimizing energy, latency, and/or area for flow-based computations. The objective of verification is to show equivalence or non-equivalence between the computational model and a specification, as logical errors can be introduced during the complex stages of synthesis. Finally, fault-tolerance techniques are explored to ensure correctness of the computations at runtime while handling device errors and to elongate the computing system's lifetime. Lastly, path-based computing is introduced, a novel in-memory computing paradigm. In contrast with flow-based computing, which is a WRITE-based computing paradigm, path-based computing is READ-based. This entails that reprogramming of the non-volatile memory devices is not required during computation. As WRITE operations have higher energy cost than READ operations, path-based computing is more energy-efficient than WRITE-based digital computing paradigms. In summary, this thesis presents a wide variety of synthesis, verification, and fault-tolerance techniques (design automation tools) for in-memory computing, paving way for a new era of energy-efficient data-intensive computing.

Completion Date

2024

Semester

Summer

Committee Chair

Ewetz, Rickard

Degree

Doctor of Philosophy (Ph.D.)

College

College of Engineering and Computer Science

Department

Computer Science

Degree Program

Computer Science

Format

application/pdf

Identifier

DP0028864

URL

https://stars.library.ucf.edu/cgi/viewcontent.cgi?article=1314&context=etd2023

Language

English

Rights

In copyright

Release Date

February 2025

Length of Campus-only Access

None

Access Status

Doctoral Dissertation (Open Access)

Campus Location

Orlando (Main) Campus

Accessibility Status

Meets minimum standards for ETDs/HUTs

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