Jfet Circuit Simulation Using Spice Implemented With An Improved Model
Abbreviated Journal Title
IEEE Trans. Comput-Aided Des. Integr. Circuits Syst.
JUNCTION; Computer Science, Hardware & Architecture; Computer Science, ; Interdisciplinary Applications; Engineering, Electrical & Electronic
Junction field effect transistor (JFET) circuit simulation using an existing physics-based JFET model is presented. This improved model has more predictive capability than the conventional JFET model employed in SPICE. Furthermore, it treats the linear and saturation regions in a unified mannner and includes the subthreshold behavior, an effect not accounted for in the conventional model. The improved model is implemented into PSPICE run on a Sun workstation, and steady-state and transient responses are simulated for a JFET switching circuit and a JFET voltage follower circuit. Results obtained from the improved model compare favorably with that obtained from a two-dimensional device simulator PISCES and from measurements. For JFET's operating outside the subthreshold region, the conventional model with optimized parameters (extracted from measurements) also shows good accuracy. However, large discrepancies arise from the conventional model if JFET's are biased in the subthreshold region or if default model parameters are used.
Ieee Transactions on Computer-Aided Design of Integrated Circuits and Systems
"Jfet Circuit Simulation Using Spice Implemented With An Improved Model" (1995). Faculty Bibliography 1990s. 1241.