Circuit analysis of BiCMOS gate delay
Abbreviated Journal Title
Int. J. Electron.
SPEED; MODEL; Engineering, Electrical & Electronic
A circuit analysis of the BiCMOS switching transient is presented. The BiCMOS pull-up delay as a function of transistor parameters and power supply voltage is evaluated. The analytical predictions are compared with SPICE circuit simulation. Good agreement between the model and SPICE simulation is obtained. Two-dimensional numerical device simulation is used to examine the physical insight into BiCMOS device operation.
International Journal of Electronics
"Circuit analysis of BiCMOS gate delay" (1997). Faculty Bibliography 1990s. 2051.