A Unified 4-Terminal Jfet Static Model For Circuit Simulation
Abbreviated Journal Title
Engineering, Electrical & Electronic; Physics, Applied; Physics, ; Condensed Matter
Junction field-effect transistors (JFETs) are useful for signal mixing purposes because of the isolated top- and bottom-gate terminals in such devices. Difficulties often arise, however, when one simulates the operation of a four-terminal JFET because the conventional JFET model treats the top and bottom gates as a single terminal. In this paper, we develop a unified four-terminal JFET static model covering both linear and saturation regions and including important device physics such as subthreshold behavior and asymmetrical top- and bottom-gate depletion layer thicknesses. Experimental data measured from JFETs fabricated at Harris Semiconductor is included in support of the model.
"A Unified 4-Terminal Jfet Static Model For Circuit Simulation" (1991). Faculty Bibliography 1990s. 374.