Adedoyin Adepegba moved to the United States in 2012 for relocation and educational purposes. She transferred to the University of Central Florida in Summer 2017 from Daytona State College. She chose her degree of study (Computer Engineering) because of her interest in computer architecture, and the idea that technology is always advancing motivates her to learn more about these advancements. She engages in undergraduate research to learn about the development in her field of study. Her undergraduate major is Computer Engineering however, she decided to double major in Electrical Engineering as well because she is very interested in learning more about electronics and electrical advancements. She engages in undergraduate research under the mentorship of Dr. Ronald F. DeMara. He is professor in the Department of Electrical and Computer Engineering at UCF. Her future career plan is to get her master’s degree in Computer Engineering then proceed to work at an engineering company that focuses on manufacturing computer hardware using evolvable hardware like spintronic devices. Her past and current research have focused on using beyond-CMOS technologies for Deep Belief Network (DBN) using Restrictive Boltzmann Machine (RBM).
Dr. Ronald F. DeMara. He is professor in the Department of Electrical and Computer Engineering at UCF
Computer Engineering and Electrical Engineering
To get my master’s degree in Computer Engineering then proceed to work at an engineering company that focuses on manufacturing computer hardware using evolvable hardware like spintronic devices.
Title: Noise Sensitivity Analysis for Deep Belief Networks Using Probabilistic Spin Logic Devices Principal Investigator: Dr. Ronald DeMara Institution: University of Central Florida Short Abstract: Herein, the noise sensitivity of a representative DBN circuit implementation using resistive weights and probabilistic spin logic devices as stochastic binary neurons is assessed. A Probabilistic Inference Network- Simulator (PIN-Sim) framework was adapted to optimize the circuit implementation of 784×10 and 784×200×10 DBN topologies. Noise-induced voltage variations ranging from ±1mV to ±20mV are applied to the input of the p-bit based neurons. Circuit simulation results indicate maximum fluctuations of 3% and 1.4% in the recognition accuracy of 784×10 and 784×200×10 DBNs, respectively. Thus, acceptable robustness from noise-induced variations are achievable for the investigated hybrid spintronic/CMOS hardware implementation of the DBNs under the conditions assessed herein
Electrical Engineering, Material Science & Engineering
Adepegba, Adedoyin, "Adedoyin Adepegba" (2019). UCF Research and Mentoring Program Scholars. 113.