Title
Design Optimization Of Stacked Gate Oxides With Easy Evaluation Of Gate Leakage In Deep Submicron Mosfet
Abstract
A simple method to evaluate the tunneling current through a double barrier is presented. Design optimization of such architectures by this method is demonstrated.
Publication Date
1-1-2000
Publication Title
Annual Device Research Conference Digest
Number of Pages
69-70
Document Type
Article
Personal Identifier
scopus
Copyright Status
Unknown
Socpus ID
0033645805 (Scopus)
Source API URL
https://api.elsevier.com/content/abstract/scopus_id/0033645805
STARS Citation
Zhang, Jinlong; Yuan, Jiann S.; and Ma, Yi, "Design Optimization Of Stacked Gate Oxides With Easy Evaluation Of Gate Leakage In Deep Submicron Mosfet" (2000). Scopus Export 2000s. 1290.
https://stars.library.ucf.edu/scopus2000/1290
COinS