Self-Checking Fault Detection Using Discrepancy Mirrors


Concurrent error detection; Fault-handling; Fault-secure circuit; Self-checking fault detection; Xilinx Virtex FPGA


A method for robust detection of faults is developed based on pairwise parallel evaluation using Discrepancy Mirror logic. Discrepancy Mirrors provide coverage for the fault detector elements within the same mechanism used for the functional logic under test. The detector logic is self-testing and propagates functional outputs with adherence to a single fault-secure property so that erroneous outputs from any single fault are not propagated. Within the detector, bitwise equality comparisons are employed directly without additional data encoding/decoding schemes to determine the validity of the output. Fault handling is performed using the underlying data throughput so that additional test vectors are not required. The circuit was implemented for a Xilinx Virtex II Pro FPGA platform and fault-secure operation was verified using ModelSim-II for exhaustive stuck-at scenarios. Results indicate fault isolation in a pool of 100,000 resources using an expected value of 17.6 to 64-1pairings when as little as one half of the inputs applied articulate the fault.

Publication Date


Publication Title

Proceedings of the 2005 International Conference on Parallel and Distributed Processing Techniques and Applications, PDPTA'05



Number of Pages


Document Type

Article; Proceedings Paper

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Socpus ID

33847199608 (Scopus)

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