Title

Design Of Lna At 2.4 Ghz Using 0.25 Μm Technology

Abstract

Two 2.4 GHz CMOS low noise amplifiers have been designed in a 0.25 μm CMOS process. One is single-ended, and the other is differential. Both are fully integrated, without off-chip components the design procedure and simulation results are presented in this paper. With a 3.3 V supply, the LNAs achieve power gains of 15 dB and 20 dB, noise figures of 2.2 dB and 2.4 dB, and third-order input intercept points (IIP3) of 1.3 dBm and 3.4 dBm the power dissipations are 7.2 mW and 4.8 mW respectively. In the differential LNA design, a smaller die area is achieved using an LC tank to replace a large inductor.

Publication Date

1-1-2001

Publication Title

2001 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2001

Number of Pages

12-17

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/SMIC.2001.942333

Socpus ID

84952043684 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/84952043684

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