Design Of Lna At 2.4 Ghz Using 0.25 Μm Technology
Two 2.4 GHz CMOS low noise amplifiers have been designed in a 0.25 μm CMOS process. One is single-ended, and the other is differential. Both are fully integrated, without off-chip components the design procedure and simulation results are presented in this paper. With a 3.3 V supply, the LNAs achieve power gains of 15 dB and 20 dB, noise figures of 2.2 dB and 2.4 dB, and third-order input intercept points (IIP3) of 1.3 dBm and 3.4 dBm the power dissipations are 7.2 mW and 4.8 mW respectively. In the differential LNA design, a smaller die area is achieved using an LC tank to replace a large inductor.
2001 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, SiRF 2001
Number of Pages
Article; Proceedings Paper
Source API URL
Xiaomin, Yang; Wu, T.; and McMacken, J., "Design Of Lna At 2.4 Ghz Using 0.25 Μm Technology" (2001). Scopus Export 2000s. 347.