Teaching asynchronous design in digital integrated circuits
Abbreviated Journal Title
IEEE Trans. Educ.
asynchronous digital circuit; Null Convention Logic (NCL); very-high-speed integration circuit hardware; description language; (VHDL) simulation; Education, Scientific Disciplines; Engineering, Electrical & Electronic
To introduce the basis of asynchronous digital circuit design in an electrical engineering curriculum, Null Convention Logic is presented as an innovative asynchronous paradigm. The design flow from concept to circuit implementation is discussed. First, two completeness criteria are required for speed independency: symbolic completeness of expression and completeness of input. Second, threshold gates with hysteresis are primary components, which are used to build logic gates, full adder, and registers. As an example, a 4 x 4 multiplier is constructed based on these threshold gates. Finally, an example of very-high-speed integration circuit hardware description language (VHDL) simulation is given to help students practice and understand the asynchronous design methodology.
Ieee Transactions on Education
"Teaching asynchronous design in digital integrated circuits" (2004). Faculty Bibliography 2000s. 4915.