Title

Teaching asynchronous design in digital integrated circuits

Authors

Authors

J. S. Yuan;W. D. Kuang

Comments

Authors: contact us about adding a copy of your work at STARS@ucf.edu

Abbreviated Journal Title

IEEE Trans. Educ.

Keywords

asynchronous digital circuit; Null Convention Logic (NCL); very-high-speed integration circuit hardware; description language; (VHDL) simulation; Education, Scientific Disciplines; Engineering, Electrical & Electronic

Abstract

To introduce the basis of asynchronous digital circuit design in an electrical engineering curriculum, Null Convention Logic is presented as an innovative asynchronous paradigm. The design flow from concept to circuit implementation is discussed. First, two completeness criteria are required for speed independency: symbolic completeness of expression and completeness of input. Second, threshold gates with hysteresis are primary components, which are used to build logic gates, full adder, and registers. As an example, a 4 x 4 multiplier is constructed based on these threshold gates. Finally, an example of very-high-speed integration circuit hardware description language (VHDL) simulation is given to help students practice and understand the asynchronous design methodology.

Journal Title

Ieee Transactions on Education

Volume

47

Issue/Number

3

Publication Date

1-1-2004

Document Type

Article

Language

English

First Page

397

Last Page

404

WOS Identifier

WOS:000223299500014

ISSN

0018-9359

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