Jfet Circuit Simulation Using Spice Implemented With An Improved Model

    Authors

    W. W. Wong;J. J. Liou

    Comments

    Authors: contact us about adding a copy of your work at STARS@ucf.edu

    Abbreviated Journal Title

    IEEE Trans. Comput-Aided Des. Integr. Circuits Syst.

    Keywords

    JUNCTION; Computer Science, Hardware & Architecture; Computer Science, ; Interdisciplinary Applications; Engineering, Electrical & Electronic

    Abstract

    Junction field effect transistor (JFET) circuit simulation using an existing physics-based JFET model is presented. This improved model has more predictive capability than the conventional JFET model employed in SPICE. Furthermore, it treats the linear and saturation regions in a unified mannner and includes the subthreshold behavior, an effect not accounted for in the conventional model. The improved model is implemented into PSPICE run on a Sun workstation, and steady-state and transient responses are simulated for a JFET switching circuit and a JFET voltage follower circuit. Results obtained from the improved model compare favorably with that obtained from a two-dimensional device simulator PISCES and from measurements. For JFET's operating outside the subthreshold region, the conventional model with optimized parameters (extracted from measurements) also shows good accuracy. However, large discrepancies arise from the conventional model if JFET's are biased in the subthreshold region or if default model parameters are used.

    Journal Title

    Ieee Transactions on Computer-Aided Design of Integrated Circuits and Systems

    Volume

    13

    Issue/Number

    1

    Publication Date

    1-1-1995

    Document Type

    Article

    Language

    English

    First Page

    105

    Last Page

    109

    WOS Identifier

    WOS:A1994MT51100010

    ISSN

    0278-0070

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