An Improved Model For Four-Terminal Junction Field-Effect Transistors

    Authors

    J. J. Liou;Y. Yue

    Comments

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    Abbreviated Journal Title

    IEEE Trans. Electron Devices

    Keywords

    Engineering, Electrical & Electronic; Physics, Applied

    Abstract

    The junction field-effect transistor (JFET) has isolated top- and bottom-gate terminals and therefore is useful for signal mixing applications. Existing models for the four-terminal JFET often have the same form as the three-terminal JFET model, however, in which only a single pinch-off voltage is used to describe the current-voltage characteristics. In this paper, a more general four-terminal JFET model is developed. Two different pinch-off voltages are involved in the improved model to account more comprehensively for the effects of both depletion regions associated with the top- and bottom-gate junctions. Results simulated from a device simulator are also included in support of the model.

    Journal Title

    Ieee Transactions on Electron Devices

    Volume

    43

    Issue/Number

    8

    Publication Date

    1-1-1996

    Document Type

    Article

    Language

    English

    First Page

    1309

    Last Page

    1311

    WOS Identifier

    WOS:A1996UZ97600023

    ISSN

    0018-9383

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