Circuit analysis of BiCMOS gate delay

    Authors

    H. D. Pham;J. S. Yuan

    Comments

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    Abbreviated Journal Title

    Int. J. Electron.

    Keywords

    SPEED; MODEL; Engineering, Electrical & Electronic

    Abstract

    A circuit analysis of the BiCMOS switching transient is presented. The BiCMOS pull-up delay as a function of transistor parameters and power supply voltage is evaluated. The analytical predictions are compared with SPICE circuit simulation. Good agreement between the model and SPICE simulation is obtained. Two-dimensional numerical device simulation is used to examine the physical insight into BiCMOS device operation.

    Journal Title

    International Journal of Electronics

    Volume

    83

    Issue/Number

    1

    Publication Date

    1-1-1997

    Document Type

    Article

    Language

    English

    First Page

    1

    Last Page

    12

    WOS Identifier

    WOS:A1997XJ76500001

    ISSN

    0020-7217

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