Title

Microprocessor-based-parallel architecture using multiport-memory interconnection networks

Authors

Authors

P. J. Wilder;R. F. DeMara

Comments

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Abbreviated Journal Title

J. Eng. Technol.

Keywords

Engineering, Multidisciplinary

Abstract

Parallel computer interconnections based on multiport memories offer attractive alternatives to link-oriented or bus-oriented interconnection networks (ICNs) for the rapid prototyping of microprocessor-based parallel machines. This paper presents an overview of multiport memory ICNs. It focuses on the MemNet hypercube interconnection network, which uses overlapping groups of four-port memories. The network provides each of the N processing elements (PEs) with Concurrent Read Exclusive Write (CREW) access to log(4)N multiport memory modules. Along each of the cube's n dimensions, memory is shared with three other PEs for a connectivity of 3(n), where n = inverted right perpendicular log(4)N inverted left perpendicular.. High connectivity is achieved while requiring on the order of NlogN memories. Details of a one-dimensional four-processor system are described, including a basic multiprocessing laboratory outline.

Journal Title

Journal of Engineering Technology

Volume

16

Issue/Number

1

Publication Date

1-1-1999

Document Type

Article

Language

English

First Page

24

WOS Identifier

WOS:000080625000005

ISSN

0747-9964

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