A Unified 4-Terminal Jfet Static Model For Circuit Simulation

    Authors

    W. W. Wong; J. J. Liou;J. Prentice

    Comments

    Authors: contact us about adding a copy of your work at STARS@ucf.edu

    Abbreviated Journal Title

    Solid-State Electron.

    Keywords

    Engineering, Electrical & Electronic; Physics, Applied; Physics, ; Condensed Matter

    Abstract

    Junction field-effect transistors (JFETs) are useful for signal mixing purposes because of the isolated top- and bottom-gate terminals in such devices. Difficulties often arise, however, when one simulates the operation of a four-terminal JFET because the conventional JFET model treats the top and bottom gates as a single terminal. In this paper, we develop a unified four-terminal JFET static model covering both linear and saturation regions and including important device physics such as subthreshold behavior and asymmetrical top- and bottom-gate depletion layer thicknesses. Experimental data measured from JFETs fabricated at Harris Semiconductor is included in support of the model.

    Journal Title

    Solid-State Electronics

    Volume

    34

    Issue/Number

    5

    Publication Date

    1-1-1991

    Document Type

    Article

    Language

    English

    First Page

    437

    Last Page

    443

    WOS Identifier

    WOS:A1991FG62600002

    ISSN

    0038-1101

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