Title

Electrostatic Discharge Robustness of Si Nanowire Field-Effect Transistors

Authors

Authors

W. Liu; J. J. Liou; A. Chung; Y. H. Jeong; W. C. Chen;H. C. Lin

Comments

Authors: contact us about adding a copy of your work at STARS@ucf.edu

Abbreviated Journal Title

IEEE Electron Device Lett.

Keywords

Electrostatic discharge (ESD); failure current I(t2); nanowire (NW); field-effect transistor; ON-state resistance; DEVICES; Engineering, Electrical & Electronic

Abstract

Electrostatic discharge (ESD) performance of N-type double-gated Si nanowire (NW) thin-film transistors is investigated, for the first time, using the transmission line pulsing technique. The ESD robustness of these devices depends on the NW dimension, number of channels, plasma treatment, and layout topology. The failure currents, leakage currents, and ON-state resistances are characterized, and possible ESD protection applications of these devices for future NW field-effect-transistor-based integrated circuits are also discussed.

Journal Title

Ieee Electron Device Letters

Volume

30

Issue/Number

9

Publication Date

1-1-2009

Document Type

Article

Language

English

First Page

969

Last Page

971

WOS Identifier

WOS:000269443000026

ISSN

0741-3106

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