An Active Compensator Scheme for Dynamic Voltage Scaling of Voltage Regulators

    Authors

    S. Y. Xiao; W. H. Qiu; G. Miller; T. X. Wu;I. Batarseh

    Abstract

    Dynamic voltage scaling (DVS) technique is a common industry practice in optimizing power consumption of microprocessors by dynamically altering the supply voltage under different operational modes, while maintaining the performance requirements. During DVS operation, it is desirable to position the output voltage to a new level commanded by the microprocessor (CPU) with minimum delay. However, voltage deviation and slow settling time usually exist due to large output capacitance and compensation delay in voltage regulators. Although optimal DVS can be achieved by modifying the output capacitance and compensation, this method is limited by constraints from stringent static and dynamic requirements. In this paper, the effects of output capacitance and compensation network on DVS operation are discussed in detail. An active compensator scheme is then proposed to ensure smooth transition of the output voltage without change of power stage and compensation during DVS. Simulation and experimental results are included to demonstrate the effectiveness of the proposed scheme.

    Journal Title

    Ieee Transactions on Power Electronics

    Volume

    24

    Issue/Number

    1-2

    Publication Date

    1-1-2009

    Document Type

    Article

    First Page

    307

    Last Page

    311

    WOS Identifier

    WOS:000263458800031

    ISSN

    0885-8993

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