Implementation of a comprehensive and robust MOSITET model in cadence SPICE for ESD applications

    Authors

    X. F. Gao; J. J. Liou; J. Bernier; G. Croft;A. Ortiz-Conde

    Abbreviated Journal Title

    IEEE Trans. Comput-Aided Des. Integr. Circuits Syst.

    Keywords

    electrostatic discharge; modeling; MOSFET; SPICE; ELECTROSTATIC DISCHARGE; SEMICONDUCTOR-DEVICES; BREAKDOWN; Computer Science, Hardware & Architecture; Computer Science, ; Interdisciplinary Applications; Engineering, Electrical & Electronic

    Abstract

    Electrostatic discharge (ESD) is a critical reliability concern for microchips. This paper presents a comprehensive computer-aided design tool for ESD applications. Specifically, the authors develop an improved and robust MOS model and implement such a model into the industry standard Cadence SPICE for ESD circuit simulation. The key components relevant to ESD in the MOS model are studied and the implementation procedure is discussed. Experimental data measured from the human body model tester are included in support of the model.

    Journal Title

    Ieee Transactions on Computer-Aided Design of Integrated Circuits and Systems

    Volume

    21

    Issue/Number

    12

    Publication Date

    1-1-2002

    Document Type

    Article

    Language

    English

    First Page

    1497

    Last Page

    1502

    WOS Identifier

    WOS:000179708700011

    ISSN

    0278-0070

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