Statistical modeling of MOS devices for parametric yield prediction

    Authors

    J. J. Liou; Q. Zhang; J. McMacken; J. R. Thomson; K. Stiles;P. Layman

    Comments

    Authors: contact us about adding a copy of your work at STARS@ucf.edu

    Abbreviated Journal Title

    Microelectron. Reliab.

    Keywords

    INTEGRATED-CIRCUITS; TRANSISTORS; METHODOLOGY; MISMATCH; Engineering, Electrical & Electronic; Nanoscience & Nanotechnology; Physics, Applied

    Abstract

    In the manufacturing of VLSI circuits, engineering designs should take into consideration random variations arising from processing, In this paper, statistical modeling of MOS devices is reviewed, and effective and practical models are developed to predict the performance spread (i.e., parametric yield) of MOS devices and circuits due to the process variations. To illustrate their applications, the models are applied to the 0.25 mum CMOS technology, and measured data are included in support of the model calculations. (C) 2002 Elsevier Science Ltd. All rights reserved.

    Journal Title

    Microelectronics Reliability

    Volume

    42

    Issue/Number

    4-5

    Publication Date

    1-1-2002

    Document Type

    Article

    Language

    English

    First Page

    787

    Last Page

    795

    WOS Identifier

    WOS:000176465800026

    ISSN

    0026-2714

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