Performance analysis and optimisation of NCL self-timed rings

    Authors

    W. Kuang; J. S. Yuan; R. F. DeMara; M. Hagedorn;K. Fant

    Comments

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    Abbreviated Journal Title

    IEE Proc.-Circuit Device Syst.

    Keywords

    Engineering, Electrical & Electronic

    Abstract

    A self-timed ring using NULL convention logic (NCL) is presented. An analytical method to evaluate the speed of NCL rings has been developed. The analytical predictions are verified by a Synopsys simulation and excellent agreement between the theoretical predictions and simulation results is obtained. Some important principles for ring optimisation are obtained. The analysis leads to the speed optimisation of a 24-bit NCL divider.

    Journal Title

    Iee Proceedings-Circuits Devices and Systems

    Volume

    150

    Issue/Number

    3

    Publication Date

    1-1-2003

    Document Type

    Article

    Language

    English

    First Page

    167

    Last Page

    172

    WOS Identifier

    WOS:000184186000004

    ISSN

    1350-2409

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