Title

The impact of Negative Acknowledgments in shared memory scientific applications

Authors

Authors

M. Chaudhuri;M. Heinrich

Comments

Authors: contact us about adding a copy of your work at STARS@ucf.edu

Abbreviated Journal Title

IEEE Trans. Parallel Distrib. Syst.

Keywords

distributed shared memory; cache coherence protocol; Negative; Acknowledgment; node controller occupancy; PERFORMANCE; Computer Science, Theory & Methods; Engineering, Electrical & Electronic

Abstract

Negative ACKnowledgments (NACKs) and subsequent retries, used to resolve races and to enforce a total order among shared memory accesses in distributed shared memory (DSM) multiprocessors, not only introduce extra network traffic and contention, but also increase node controller occupancy, especially at the home. In this paper, we present possible protocol optimizations to minimize these retries and offer a thorough study of the performance effects of these messages on six scalable scientific applications running on 64-node systems and larger. To eliminate NACKs, we present a mechanism to queue pending requests at the main memory of the home node and augment it with a novel technique of combining pending read requests, thereby accelerating the parallel execution for 64 nodes by as much as 41 percent (a speedup of 1.41) compared to a modified version of the SGI Origin 2000 protocol. We further design and evaluate a protocol by combining this mechanism with a technique that we call write string forwarding, used in the AlphaServer GS320 and Piranha systems. We find that without careful design considerations, especially regarding atomic read-modify-write operations, this aggressive write forwarding can hurt performance. We identify and evaluate the necessary micro-architectural support to solve this problem. We compare the performance of these novel NACK-free protocols with a base bitvector protocol, a modified version of the SGI Origin 2000 protocol, and a NACK-free protocol that uses dirty sharing and write string forwarding as in the Piranha system. To understand the effects of network speed and topology the evaluation is carried out on three network configurations.

Journal Title

Ieee Transactions on Parallel and Distributed Systems

Volume

15

Issue/Number

2

Publication Date

1-1-2004

Document Type

Article

Language

English

First Page

134

Last Page

150

WOS Identifier

WOS:000188369400004

ISSN

1045-9219

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