An analytical threshold voltage model of NMOSFETs with hot-carrier induced interface charge effect

    Authors

    C. S. Ho; K. Y. Huang; M. Tang;J. J. Liou

    Comments

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    Abbreviated Journal Title

    Microelectron. Reliab.

    Keywords

    DEGRADATION; MOSFETS; Engineering, Electrical & Electronic; Nanoscience & Nanotechnology; Physics, Applied

    Abstract

    An analytical threshold voltage model of NMOSFETs including the effect of hot-carrier-induced interface charges is presented. A step function describing the interface charge distribution along the channel is used to account for the hot carrier induced damage, and a pseudo-2D method is applied to derive the surface potential. The threshold voltage model is then developed by solving the gate-to-source voltage at the onset of surface inversion where the minimum surface potential equals the channel potential. Both the drain-induced barrier lowering (DIBL) and body effects are included in the present model as well. The present threshold voltage model is validated for both fresh and damaged devices. The results show that the threshold voltage shifts upward and approaches a maximum value with negative interface charges and shifts downward and reaches a minimum value with positive interface charges as the interface charge region length is increased from zero to the channel length. Model is successfully verified using simulation data obtained from TCAD (technology-based computer-aided design). (c) 2004 Elsevier Ltd. All rights reserved.

    Journal Title

    Microelectronics Reliability

    Volume

    45

    Issue/Number

    7-8

    Publication Date

    1-1-2005

    Document Type

    Article

    Language

    English

    First Page

    1144

    Last Page

    1149

    WOS Identifier

    WOS:000230374600013

    ISSN

    0026-2714

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