An improved junction capacitance model for junction field-effect transistors

    Authors

    H. Ding; J. J. Liou; C. R. Cirba;K. Green

    Comments

    Authors: contact us about adding a copy of your work at STARS@ucf.edu

    Abbreviated Journal Title

    Solid-State Electron.

    Keywords

    compact modeling; junction capacitance; junction field-effect transistor; Engineering, Electrical & Electronic; Physics, Applied; Physics, ; Condensed Matter

    Abstract

    A new junction capacitance model for the four-terminal junction field-effect transistor (JFET) is presented. With a single expression, the model, which is valid for different temperatures and a wide range of bias conditions, describes correctly the JFET junction capacitance behavior and capacitance drop-off phenomenon. The model has been verified using experimental data measured at Texas Instruments. (c) 2006 Elsevier Ltd. All rights reserved.

    Journal Title

    Solid-State Electronics

    Volume

    50

    Issue/Number

    7-8

    Publication Date

    1-1-2006

    Document Type

    Article

    Language

    English

    First Page

    1395

    Last Page

    1399

    WOS Identifier

    WOS:000240668200037

    ISSN

    0038-1101

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