An analytical drain current model of short-channel MOSFETs including source/drain resistance effect

    Authors

    C. S. Ho; J. J. Liou; H. L. Lo; Y. H. Chang; C. Chang;K. Yu

    Comments

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    Abbreviated Journal Title

    Int. J. Electron.

    Keywords

    drain current; source/drain parasitic resistance; reverse short channel; effect (RSCE); velocity saturation; channel length modulation (CLM); drain-induced barier lowering (DIBL); THRESHOLD VOLTAGE; MOS DEVICES; SILICON; VLSI; Engineering, Electrical & Electronic

    Abstract

    In this paper, the DC characteristics of MOSFETs are investigated by means of an analytical approach with considerations of the source/drain parasitic resistance (R-S/R-D). Experimental data of MOS devices for DRAM design and results of TCAD simulation are used to verify the accuracy of theoretical calculation. It is found that both the R-S and R-D can induce a large reduction in the drain current in the linear region, but only the source resistance can cause a large reduction in the drain current in the saturation region. Moreover, the drain current deduction due to the R-S/R-D increases with decreasing channel length and oxide thickness.

    Journal Title

    International Journal of Electronics

    Volume

    93

    Issue/Number

    3

    Publication Date

    1-1-2006

    Document Type

    Article

    Language

    English

    First Page

    137

    Last Page

    148

    WOS Identifier

    WOS:000236650700001

    ISSN

    0020-7217

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