Dynamic voltage stress effects on nMOS varactor

    Authors

    C. Z. Yu; J. S. Yuan;E. J. Xiao

    Comments

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    Abbreviated Journal Title

    Microelectron. Reliab.

    Keywords

    Engineering, Electrical & Electronic; Nanoscience & Nanotechnology; Physics, Applied

    Abstract

    The degradations in the nMOS device due to high-frequency (900 MHz) dynamic stress are shown experimentally. The stress-induced shifts in DC and larger-signal C-V characteristics are presented. Although the high-frequency stress-induced degradations are much smaller than DC stress, the effects on C-V curves and quality factor cannot be neglected. An nMOS LC oscillator, wherein the varactor is operated under the same dynamic bias conditions as in the stress experiment, has been evaluated through Cadence Spectre simulation. The performance of the LC oscillator degrades significantly due to the dynamic stress.

    Journal Title

    Microelectronics Reliability

    Volume

    46

    Issue/Number

    9-11

    Publication Date

    1-1-2006

    Document Type

    Article; Proceedings Paper

    Language

    English

    First Page

    1812

    Last Page

    1816

    WOS Identifier

    WOS:000240776100073

    ISSN

    0026-2714

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