Low-frequency noise assessment of silicon passivated Ge pMOSFETs with TiN/TaN/HfO2 gate stack

Authors

    Authors

    W. Guo; G. Nicholas; B. Kaczer; R. M. Todi; B. De Jaeger; C. Claeys; A. Mercha; E. Simoen; B. Cretu; J. M. Routoure;R. Carin

    Comments

    Authors: contact us about adding a copy of your work at STARS@ucf.edu

    Abbreviated Journal Title

    IEEE Electron Device Lett.

    Keywords

    germanium (Ge); interface traps; low-frequency (LF) noise; oxide traps; pMOSFETs; HIGH-K GATE; 1/F NOISE; MOS-TRANSISTORS; HFO2; DIELECTRICS; MOSFETS; PERFORMANCE; INTERLAYERS; MOBILITY; BEHAVIOR; Engineering, Electrical & Electronic

    Abstract

    The low-frequency noise of pMOSFETs fabricated in epitaxial germanium-on-silicon substrates is studied. The gate stack consists of a TiN/TaN metal gate on top of a 1.3-nm equivalent oxide thickness HfO2/SiO2 gate dielectric bilayer. The latter is grown by chemical oxidation of a thin epitaxial silicon film deposited to passivate the germanium surface. It is shown that the spectrum is of the 1/f(gamma) type, which obeys number fluctuations for intermediate gate voltage overdrives. A correlation between the low-field mobility and the oxide trap density derived from the 1/f noise magnitude and the interface trap density obtained from charge pumping is reported and explained by considering remote Coulomb scattering.

    Journal Title

    Ieee Electron Device Letters

    Volume

    28

    Issue/Number

    4

    Publication Date

    1-1-2007

    Document Type

    Article

    Language

    English

    First Page

    288

    Last Page

    291

    WOS Identifier

    WOS:000245225300011

    ISSN

    0741-3106

    Share

    COinS