Title

The Effect of SOA Enhancement on Device Ruggedness Under UIS for the LDMOSFET

Authors

Authors

J. B. Steighner;J. S. Yuan

Comments

Authors: contact us about adding a copy of your work at STARS@ucf.edu

Abbreviated Journal Title

IEEE Trans. Device Mater. Reliab.

Keywords

Breakdown voltage; device ruggedness; LDMOS; ON-resistance; power; MOSFET; safe operating area (SOA); unclamped inductive switching (UIS); NO-SNAPBACK LDMOSFET; Engineering, Electrical & Electronic; Physics, Applied

Abstract

This paper presents a unified study on the relationship between safe operating area (SOA) enhancement and unclamped inductive switching (UIS) behavior in an LDMOS. Popularized methods of SOA enhancement techniques are implemented, including a highly doped p+ bottom layer, n-adaptive layer, and drift extension. The effect that each enhancement has on SOA is first analyzed and shown, followed by the impact that it has on device ruggedness as measured through the UIS test. The energy absorbed during UIS, time in avalanche, and peak lattice temperature are each considered in evaluating ruggedness. OFF-state breakdown voltages and ON-resistances are also analyzed. The results indicate varying behavior during UIS, depending on each SOA enhancement technique used.

Journal Title

Ieee Transactions on Device and Materials Reliability

Volume

11

Issue/Number

2

Publication Date

1-1-2011

Document Type

Article

Language

English

First Page

254

Last Page

262

WOS Identifier

WOS:000291819900007

ISSN

1530-4388

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