Advanced Low-Voltage Power MOSFET Technology for Power Supply in Package Applications

    Authors

    B. Y. Yang; J. Wang; S. M. Xu; J. Korec;Z. J. Shen

    Comments

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    Abbreviated Journal Title

    IEEE Trans. Power Electron.

    Keywords

    Asymmetric gate resistor; gate voltage pull-down circuit; integration; low-voltage power MOSFET; power loss; source-down structure power; MOSFET; stacked-die package; synchronous buck converters; CONVERTERS; FREQUENCY; Engineering, Electrical & Electronic

    Abstract

    In this paper, a high-current dc-dc power supply in package is reported with an emphasis on the design aspects of the low- and high-side power MOSFETs embedded in the power module. A new NexFET structure with its source electrode on the bottom side of the die (source down) is designed to enable an innovative stacked-die PSiP technology with significantly reduced parasitic inductance and package footprint. A gate voltage pull-down circuitry monolithically integrated in the low-side NexFET is introduced to effectively prevent shoot-through faults even when a very low gate threshold voltage is used to reduce conduction and body diode reverse-recovery-related power losses. In addition, an asymmetric gate resistor circuitry is monolithically integrated in the high-side NexFET to minimize voltage ringing at the switch node. With all these novel device technology improvements, the new power supply in package module delivers a significant improvement in efficiency and offers an excellent solution for future high-frequency, high-current-density dc-dc converters.

    Journal Title

    Ieee Transactions on Power Electronics

    Volume

    28

    Issue/Number

    9

    Publication Date

    1-1-2013

    Document Type

    Article

    Language

    English

    First Page

    4202

    Last Page

    4215

    WOS Identifier

    WOS:000315482700008

    ISSN

    0885-8993

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