In Situ ESD Protection Structure for Variable Operating Voltage Interface Applications in 28-nm CMOS Process

    Authors

    S. R. Luo; J. A. Salcedo; S. Parthasarathy; Y. Z. Zhou; J. J. Hajjar;J. J. Liou

    Comments

    Authors: contact us about adding a copy of your work at [email protected]

    Abbreviated Journal Title

    IEEE Trans. Device Mater. Reliab.

    Keywords

    28 nm CMOS; converters; monolithic IO ESD protection; RF ICS; CAPACITANCE; CIRCUITS; SIGNAL; Engineering, Electrical & Electronic; Physics, Applied

    Abstract

    A multiple-discharge-path electrostatic discharge (ESD) cell for protecting input/output (IO) pins with a variable operating voltage (0.5-3.5 V) is presented. This device is optimized for low capacitance and synthesized with the circuit IO components for in situ ESD protection in communication interface applications developed in the 28-nm high-k metal-gate CMOS technology.

    Journal Title

    Ieee Transactions on Device and Materials Reliability

    Volume

    14

    Issue/Number

    4

    Publication Date

    1-1-2014

    Document Type

    Article

    Language

    English

    First Page

    1061

    Last Page

    1067

    WOS Identifier

    WOS:000345984600018

    ISSN

    1530-4388

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