Progress in Autonomous Fault Recovery of Field Programmable Gate Arrays

    Authors

    M. G. Parris; C. A. Sharma;R. F. Demara

    Comments

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    Abbreviated Journal Title

    ACM Comput. Surv.

    Keywords

    Design; Performance; Reliability; FPGA; evolvable hardware; autonomous; systems; self-test; reconfigurable architectures; FPGA LOGIC BLOCKS; RELIABILITY; METHODOLOGIES; Computer Science, Theory & Methods

    Abstract

    The capabilities of current fault-handling techniques for Field Programmable Gate Arrays (FPGAs) develop a descriptive classification ranging from simple passive techniques to robust dynamic methods. Fault-handling methods not requiring modification of the FPGA device architecture or user intervention to recover from faults are examined and evaluated against overhead-based and sustainability-based performance metrics such as additional resource requirements, throughput reduction, fault capacity, and fault coverage. This classification alongside these performance metrics forms a standard for confident comparisons.

    Journal Title

    Acm Computing Surveys

    Volume

    43

    Issue/Number

    4

    Publication Date

    1-1-2011

    Document Type

    Article

    Language

    English

    First Page

    30

    WOS Identifier

    WOS:000297145500008

    ISSN

    0360-0300

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