Numerically Controlled Oscillator Based Digital Phase Locked Loop Design and Simulatiohn for Carrier Recovery Application
This thesis describes a simulation tool that can be used to design and evaluate digital phase lock loops. The simulation model is based on carrier recovery applications which uses a type II loop in conjunction with the multiplying phase detector. Models for the loop components are developed which include equations for the Numerically Controlled Oscillator, multipling phase detector and a loop integrator. The effects of truncation error on output signal-to-noise ratio in the waveform map is examined. The loop equations are derived using the impulse invariance method from the classic type II second order loop. As such, the damping factor ζ and the loop bandwidth ω are expressed in the Z domain. The digital phase locked loop (DPLL) is simulated on Matlab software. The simulation is used to study the characteristics of the DPLL. The steady state and transient responses of the loop are investigated. Additionally, non-linear behavior such as frequency asquisition and performance in the presence of "significant" noise are simulated. Finally, the problem of "hang-up" is described and simulated.
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Belkerdid, Madjid A.
Master of Science (M.S.)
College of Engineering
Length of Campus-only Access
Masters Thesis (Open Access)
Dissertations, Academic -- Engineering; Engineering -- Dissertations, Academic
Bryan, Jr., Thomas James, "Numerically Controlled Oscillator Based Digital Phase Locked Loop Design and Simulatiohn for Carrier Recovery Application" (1991). Retrospective Theses and Dissertations. 3798.