Title
Testing The Impact Of Process Defects On Ecl Power-Delay Performance
Keywords
power-delay product; process defect; spot defect
Abstract
The impact of process defects on ECL power-delay product has been evaluated. The authors have developed the modeling equations including the process defects in the delay analysis. The delay equation provides the insight into the sensitivity of various process defects in ECL gate delay. The testing model equations are physics based and can be generalized to digital circuits other than ECL logic.
Publication Date
1-1-1991
Publication Title
Proceedings of the IEEE VLSI Test Symposium
Number of Pages
233-238
Document Type
Article; Proceedings Paper
Personal Identifier
scopus
DOI Link
https://doi.org/10.1109/VTEST.1991.208164
Copyright Status
Unknown
Socpus ID
85065740796 (Scopus)
Source API URL
https://api.elsevier.com/content/abstract/scopus_id/85065740796
STARS Citation
Yuan, J. S.; Liou, J. J.; and Wu, D. M., "Testing The Impact Of Process Defects On Ecl Power-Delay Performance" (1991). Scopus Export 1990s. 1267.
https://stars.library.ucf.edu/scopus1990/1267