Parasitic Capacitance Effects Of The Multilevel Interconnects In Dram Circuits

Abstract

The parasitic capacitance effects of the multilevel interconnects in DRAM circuits have been studied. Signal crosstalk such as intra- and inter- bit-line-to-bit-line coupling, bit-line-to-work-line coupling, and substrate noise coupling resulting from various parasitic capacitances between interconnects are presented. The intra-bit-line capacitance coupling and bit-line capacitance imbalance effects reduce the initial voltage difference between bit lines and degrade the sense amplifier sensing speed. The inter-bit-line capacitive coupling and bit-line-to-word-line signal crosstalk introduce significant array noise in multimegabit DRAMs. The depletion capacitance between n+ diffusion and p substrate offers a channel of the substrate interference noise during sense amplifier amplification.

Publication Date

12-1-1990

Publication Title

Proceedings - International IEEE VLSI Multilevel Interconnection Conference

Number of Pages

410-412

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

Socpus ID

0025547750 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/0025547750

This document is currently not available here.

Share

COinS