Title
Cache coherence in a multiport memory environment
Keywords
Directory-Based Coherence Protocol; Multiport Memory; Multiprocessor Cache Coherence; Shared-Memory Multiprocessors; Snooping Bus
Abstract
The effects of various cache coherence strategies are analyzed for a multiported shared memory multiprocessor. Analytical models for concurrent read exclusive write access (CREW) and concurrent read concurrent write access (CRCW) are developed including shared-not-cacheable, snooping bus, snooping bus with cache-to-cache transfers, and directory protocols. The performance of each protocol is shown as the hit rate, main memory-to-cache memory cycle time ratio, fraction of shared data, read percentage, and number of partitions are varied. Overall, results indicate that a snooping bus with cache-to-cache transfer scheme provides consistently fast access times over a wide range of execution parameters. However, nearly equivalent performance can be obtained with simpler directory based schemes. The implications of these results on increasing port complexity and memory usage are discussed.
Publication Date
1-1-1994
Publication Title
MPCS 1994 - 1st International Conference on Massively Parallel Computing Systems: The Challenges of General-Purpose and Special-Purpose Computing
Number of Pages
632-642
Document Type
Article; Proceedings Paper
Identifier
scopus
Personal Identifier
scopus
DOI Link
https://doi.org/10.1109/MPCS.1994.367024
Copyright Status
Unknown
Socpus ID
84925340122 (Scopus)
Source API URL
https://api.elsevier.com/content/abstract/scopus_id/84925340122
STARS Citation
Crawford, S. E. and Demara, R. F., "Cache coherence in a multiport memory environment" (1994). Scopus Export 1990s. 233.
https://stars.library.ucf.edu/scopus1990/233