Title

Microprocessor-Based Parallel Architectures Using Multiport-Memory Interconnection Networks

Abstract

Parallel computer interconnections based on multiport memories offer attractive alternatives to link-oriented or bus-oriented interconnection networks (ICNs) for the rapid prototyping of microprocessor-based parallel machines. This paper presents an overview of multiport memory ICNs. It focuses on the MemNet hypercube interconnection network, which uses overlapping groups of four-port memories. The network provides each of the N processing elements (PEs) with Concurrent Read Exclusive Write (CREW) access to log 4N multiport memory modules. Along each of the cube's n dimensions, memory is shared with three other PEs for a connectivity of 3 n, where n = [log 4N]. High connectivity is achieved while requiring on the order of NlogN memories. Details of a one-dimensional four-processor system are described, including a basic multiprocessing laboratory outline.

Publication Date

3-1-1999

Publication Title

Journal of Engineering Technology

Volume

16

Issue

1

Number of Pages

24-31

Document Type

Article

Personal Identifier

scopus

Socpus ID

0032613874 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/0032613874

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