Title

Evaluation Of Rf Electrostatic Discharge (Esd) Protection In 0.18-Μm Cmos Technology

Abstract

Electrostatic discharge (ESD) protection design is challenging for RF integrated circuits (ICs) because of the trade-off between the ESD robustness and parasitic capacitance. ESD protection devices are fabricated using the 0.18-μm RF CMOS process and their RF ESD characteristics are investigated by the transmission line pulsing (TLP) tester. The results suggest that the silicon controlled rectifier (SCR) is superior to the diode and NMOS from the perspective of ESD robustness and parasitic, but the SCR nevertheless possesses a longer turn-on time. © 2008 Elsevier Ltd. All rights reserved.

Publication Date

7-1-2008

Publication Title

Microelectronics Reliability

Volume

48

Issue

7

Number of Pages

995-999

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1016/j.microrel.2008.04.005

Socpus ID

48149115040 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/48149115040

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