Title

Front End Device For Content Networking

Abstract

The bandwidth and speed of network connections are continually increasing. The speed increase in network technology is set to soon outpace the speed increase in CMOS technology. This asymmetrical growth is beginning to causing software applications that once worked with then current levels of network traffic to flounder under the new high data rates. Processes that were once executed in software now have to be executed, partially if not wholly in hardware. One such application that could benefit from hardware implementation is high layer routing. By allowing a network device to peer into higher layers of the OSI model, the device can scan for viruses, provide higher quality-of-service (QoS), and efficiently route packets. This paper proposes an architecture for a device that will utilize hardware-level string matching to distribute incoming requests for a server farm. The proposed architecture is implemented in VHDL, synthesized, and laid out on an Altera FPGA. © 2008 EDAA.

Publication Date

8-25-2008

Publication Title

Proceedings -Design, Automation and Test in Europe, DATE

Number of Pages

1456-1461

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/DATE.2008.4484879

Socpus ID

49749141056 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/49749141056

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