Routing On Field-Programmable Switch Matrices
Field programmable gate arrays (FPGAs); Interconnect structures; Multi-FPGA systems; Switch routing
In this paper, we address the problem of routing nets on field programmable gate arrays (FPGAs) interconnected by a switch matrix. We extend the switch matrix architecture proposed by Zhu et al. to route nets between FPGA chips in a multi-FPGA system. Given a limited number of routing resources in the form of programmable connection points within a two-dimensional switch matrix, this problem examines the issue of how to route a given net traffic through the switch matrix structure. First, we define the problem as a general undirected graph in which each vertex has one single color among six possible colors and formulate it as a constraint satisfaction problem. This is further modeled as a 0-1 multidimensional knapsack problem for which a fast approximate solution is applied. Experimental results show that the accuracy of our proposed heuristic is quite high for moderately large switch matrices.
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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Ejnioui, Abdel and Ranganathan, N., "Routing On Field-Programmable Switch Matrices" (2003). Scopus Export 2000s. 1799.