Title

Worst-Case Analysis And Statistical Simulation Of Mosfet Devices Based On Parametric Test Data

Keywords

BSIM3v3 model; Digital circuits; Latin hypercube sampling; MOSFET devices; Parametric test data; Principal component analysis; Statistical simulation; Worst-case analysis

Abstract

A practical and efficient approach for estimating the MOSFET device and circuit performance distributions is presented. The proposed method is based on the Latin hypercube sampling technique and direct extracting and utilizing the statistical information obtained from a population of parametric test data. Using this approach, a set of worst-case models taking into account data correlations and equal probability constraints is developed. The procedure allows for a systematical and accurate way to predict the performance spread and worst case of MOSFET circuits, as well as a greatly reduced computation time for statistical simulation. Measured data of two digital circuits are included in support of the modeling work. © 2001 Elsevier Science Ltd. All rights reserved.

Publication Date

9-1-2001

Publication Title

Solid-State Electronics

Volume

45

Issue

9

Number of Pages

1537-1547

Document Type

Article

Personal Identifier

scopus

DOI Link

https://doi.org/10.1016/S0038-1101(01)00177-0

Socpus ID

0035447691 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/0035447691

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