Title

Analyzing The Simultaneous Switching Noise Due To Internal Gate Switching

Abstract

In this paper, the ground bounce noise due to internal gate switching is studied. It has been found that both power-rail and ground-rail pin impedances are important in evaluating internal ground bounces. Based on the lumped-model analysis taking into account the parasitic effects of MOS transistors, a novel analytical model is developed which accurately accounts for both power rail and ground rail pin impedances. The proposed model is compared with the previous work and validated by SPICE simulation results.

Publication Date

12-1-2002

Publication Title

Midwest Symposium on Circuits and Systems

Volume

1

Document Type

Article; Proceedings Paper

Personal Identifier

scopus

Socpus ID

0036979296 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/0036979296

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