Title
Teaching Asynchronous Design In Digital Integrated Circuits
Abstract
To introduce the basis of asynchronous digital circuit design in an electrical engineering curriculum, Null Convention Logic is presented as an innovative asynchronous paradigm. The design flow from concept to circuit implementation is discussed. First, two completeness criteria are required for speed independency: symbolic completeness of expression and completeness of input. Second, threshold gates with hysteresis are primary components, which are used to build logic gates, full adder, and registers. As an example, a 4 × 4 multiplier is constructed based on these threshold gates. Finally, an example of very-high-speed integration circuit hardware description language (VHDL) simulation is given to help students practice and understand the asynchronous design methodology. © 2004 IEEE.
Publication Date
8-1-2004
Publication Title
IEEE Transactions on Education
Volume
47
Issue
3
Number of Pages
397-404
Document Type
Article
Personal Identifier
scopus
DOI Link
https://doi.org/10.1109/TE.2004.825923
Copyright Status
Unknown
Socpus ID
4344616097 (Scopus)
Source API URL
https://api.elsevier.com/content/abstract/scopus_id/4344616097
STARS Citation
Yuan, Jiann S. and Kuang, Weidong, "Teaching Asynchronous Design In Digital Integrated Circuits" (2004). Scopus Export 2000s. 5108.
https://stars.library.ucf.edu/scopus2000/5108