Title

Iterative Viterbi Algorithm: Implementation Issues

Keywords

Coding for wireless systems; Iterative decoding; Serial concatenated codes; Turbo decoding; Viterbi decoding

Abstract

We address several issues for implementing the iterative Viterbi decoder. We show that 3-bit branch metric quantization, 7- or 8-bit state metric precision, and a survivor length of five times the constraint length yields little degradation for the iterative Viterbi algorithm (IVA). Our results show that without changing the VA hardware (except adding some additional circuits), the error performance of several standard systems can be significantly improved.

Publication Date

3-1-2004

Publication Title

IEEE Transactions on Wireless Communications

Volume

3

Issue

2

Number of Pages

382-386

Document Type

Review

Personal Identifier

scopus

DOI Link

https://doi.org/10.1109/TWC.2003.821149

Socpus ID

2342637049 (Scopus)

Source API URL

https://api.elsevier.com/content/abstract/scopus_id/2342637049

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